ch10_handbook:parallel_data
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| Next revision | Previous revision | ||
| ch10_handbook:parallel_data [2014/04/14 08:48] – created bob | ch10_handbook:parallel_data [2014/05/29 14:42] (current) – bob | ||
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| + | ~~ODT~~ | ||
| ===== PARALLEL DATA ===== | ===== PARALLEL DATA ===== | ||
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| recorder interface. The addressable block size is 4356 bytes. The electrical interface is byte-wide | recorder interface. The addressable block size is 4356 bytes. The electrical interface is byte-wide | ||
| differential emitter-coupled logic (ECL). A simplified depiction of the interface is shown | differential emitter-coupled logic (ECL). A simplified depiction of the interface is shown | ||
| - | in Figure 6-50. | + | below. |
| - | FIXME | + | {{ : |
| < | < | ||
ch10_handbook/parallel_data.1397483316.txt.gz · Last modified: 2014/04/14 08:48 by bob